The present invention generally relates to access control devices and testing methods, and, more particularly, to an access control device and a testing method by which a printed substrate test, a test on a device incorporated into a system, a system control operation, a system monitoring operation, and a system diagnosis are conducted through high-speed access to serial interfaces based on a command and data that specify a testing route or a diagnosing route.
The present invention is particularly suitable for making a high-speed access to a serial interface to which the testing method of the IEEE Standard 1149.1 introduced by the Joint Test Action Group (hereinafter referred to as JTAG for short) is applied. A testing method in accordance with the present invention is designed for testing or diagnosing an object device.
Conventionally, the JTAG technique is used in tests for detecting defective products among printed wiring boards. Since there is no need to perform a particularly high-speed operation and the control process is complicated, a control operation that puts emphasis on the software (hereinafter referred to as a JTAG control operation) is performed.
Among the simplest methods, there is a first method in which signals necessary for a JTAG control operation such as a TCK (Test Clock) signal, a TMS (Test Mode Select) signal, a TDI (Test Data In) signal, a TDO (Test Data Out) signal are stored in registers that can be accessed from the software, and the software changes the register contests between “1” and “0” so as to change states and writes data (TDI signal), thereby reading out the TDO signal.
As a higher-speed method, there is a second method in which shift registers each having a predetermined number of bits and accessible from the software for read and write are provided on the side of the control device, and the shift registers are connected in a loop-like state to the register of a device such as a boundary cell, so that the software can perform read and write operations with the shift registers as a window.
FIG. 1 is a block diagram showing the structure of a conventional access control device that employs the second method. In this structure, accesses to an instruction register (IR) 3 and data registers (DR) 4 through 6 are controlled using a window register 2 that can be read and write by a processor 1. More specifically, an instruction for specifying which of the data registers 4 through 6 is to be accessed is written in the instruction register 3. After setting a value in the window register 2, the software of the processor 1 performs a shift operation to write via a pin (TAP) 7. Also, after a shift operation, the processor 1 reads out from the window register 2 the value of a selected one of the data registers outputted via a TDO signal.
FIG. 2 shows software operations and hardware operations performed by the access control device shown in FIG. 1. As an example, FIG. 2 shows a sequence of a case where the value of a TDI signal is written in the data register 4, and the contents of the data register 5 are read out as a TDO signal. In this case, the software operations need to be meticulously controlled, as shown in FIG. 2.
In accordance with the first method, however, a control operation by the software requires a long time, and, therefore, high-speed processing is difficult to achieve. Especially when a large volume of data contained in a memory is to be accessed, such a control operation by the software is not suitable.
Meanwhile, the second method is not suitable, either, for making an access to a large volume of data, because a data setting operation or a read operation needs to be performed through a shift register (a window) each time, even when a control device having a shift register is connected in a loop-like manner. Also, with the second method, it is necessary to make an access to a register at short intervals, resulting in a larger process load on the software.